Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - NIOSII flash

Search list

[Embeded-SCM Develop] NIOSIIFLASHStep_by_step

Description: 将NiosII程序下载到Flash的方法（Step_by_step）.pdf-NiosII procedures will be downloaded to the Flash (Step_by_step). P df
Platform: | Size: 191765 | Author: 高 | Hits:

[Other resource] leon3-altera-ep2s60-ddr

Description: This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be read but not written. NOTE: the test bench cannot be simulated with DDR enabled because the Altera pads do not have the correct delay models. * How to program the flash prom with a FPGA programming file 1. Create a hex file of the programming file with Quartus. 2. Convert it to srecord and adjust the load address: objcopy --adjust-vma=0x800000 output_file.hexout -O srec fpga.srec 3. Program the flash memory using grmon: flash erase 0x800000 0xb00000 flash load fpga.srec
Platform: | Size: 114780 | Author: king.xia | Hits:

[Embeded-SCM Develop] NiosII

Description: NiosII的范例，包含Alarm、DMA、Fine-gained Flash Access驱动、HighResTimer、ISR、Simple Flash Access驱动、利用重载技巧实现最小代码尺寸、字符模式设备7个范例，并有测试结果
Platform: | Size: 10959 | Author: dq | Hits:

[Embeded-SCM Develop] NIOS-Flash

Description: NiosII的Flash编程指南（www.sopc.net.cn）
Platform: | Size: 4947532 | Author: 齐晶 | Hits:

[Embeded-SCM Develop] NIOSIIFLASHStep_by_step

Description: 将NiosII程序下载到Flash的方法（Step_by_step）.pdf-NiosII procedures will be downloaded to the Flash (Step_by_step). P df
Platform: | Size: 191488 | Author: 高 | Hits:

[VHDL-FPGA-Verilog] leon3-altera-ep2s60-ddr

Description: This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be read but not written. NOTE: the test bench cannot be simulated with DDR enabled because the Altera pads do not have the correct delay models. * How to program the flash prom with a FPGA programming file 1. Create a hex file of the programming file with Quartus. 2. Convert it to srecord and adjust the load address: objcopy --adjust-vma=0x800000 output_file.hexout -O srec fpga.srec 3. Program the flash memory using grmon: flash erase 0x800000 0xb00000 flash load fpga.srec-This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be read but not written. NOTE: the test bench cannot be simulated with DDR enabled because the Altera pads do not have the correct delay models. * How to program the flash prom with a FPGA programming file 1. Create a hex file of the programming file with Quartus. 2. Convert it to srecord and adjust the load address: objcopy--adjust-vma=0x800000 output_file.hexout-O srec fpga.srec 3. Program the flash memory using grmon: flash erase 0x800000 0xb00000 flash load fpga.srec
Platform: | Size: 114688 | Author: | Hits:

[Embeded-SCM Develop] falsh

Description: flash芯片的驱动，在NiosII里运用，在NiosII IDE里进行编译-flash chip drivers, in NiosII in use, carried out in NiosII IDE compiler
Platform: | Size: 2048 | Author: 韩启祥 | Hits:

[Embeded-SCM Develop] CF_NiosII5.0

Description: Compact Flash Support For Nios II 5.0, To download supporting materials for this new Compact Flash support, download the following .zip file, extract to a computer with Quartus II 5.0 & Nios II 5.0 installed, and proceed to use the hardware and/or software examples of your choice to proceed. Additional information is available in the readme.txt document, included in the top-level of the .zip file
Platform: | Size: 1589248 | Author: Robert | Hits:

[Embeded-SCM Develop] NiosII

Description: NiosII的范例，包含Alarm、DMA、Fine-gained Flash Access驱动、HighResTimer、ISR、Simple Flash Access驱动、利用重载技巧实现最小代码尺寸、字符模式设备7个范例，并有测试结果-NiosII example, contains Alarm, DMA, Fine-gained Flash Access driver, HighResTimer, ISR, Simple Flash Access drive, use heavy-duty techniques to achieve the smallest code size, character-mode device 7 sample, and test results
Platform: | Size: 10240 | Author: dq | Hits:

[Embeded-SCM Develop] NIOS-Flash

Description: NiosII的Flash编程指南（www.sopc.net.cn）-NiosII the Flash Programming Guide (www.sopc.net.cn)
Platform: | Size: 4946944 | Author: 齐晶 | Hits:

[Other Embeded program] NiosII_example

Description: include:alarm, DMA, fine_gainde flash, HighResTime,ISR,Simple flash,and so on-include: alarm, DMA, fine_gainde flash, HighResTime, ISR, Simple flash, and so on
Platform: | Size: 8192 | Author: tuya | Hits:

[VHDL-FPGA-Verilog] DEMO1_KEY_LED

Description: KX_DVP3F型FPGA应用板/开发板（全套）包括：  CycloneII系列FPGA EP2C8Q208C8 40万们，含20M-270MHz锁相环2个。  RS232串行接口；VGA视频口  高速SRAM 512KB。可用于语音处理，NiosII运行等。  配置Flash EPCS2， 10万次烧写周期 。  isp单片机T89S8253：MCS51兼容单片机，12KB在系统可编程Flash ROM，10万次烧 写周期；2KB在系统可编程EEPROM，10万次烧写周期；2.7V-5.5V工作电压；0-24MHz 工作时钟；  2数码管显示器、20MHz时钟源（可通过FPGA中的锁相环倍频）；  液晶显示屏（20字X4行）；  工作电源5V、3.3V、1.2V混合电压源，良好电磁兼容性主板。  配套示例程序、资料、编程软件光盘等。  4X4键盘，4普通按键，8可锁按键，8发光管  BlasterMV编程下载器和并口通信线，可完成FPGA编程下载和isp单片机的编程。KX_DV3F开发板的源程序-err
Platform: | Size: 360448 | Author: ldg | Hits:

[VHDL-FPGA-Verilog] NIOSII_tutorial_code

Description: NIOSII实例代码。包括系统时钟代码，DMA(Memory to Memory)驱动代码，Fine-gained Flash Access驱动代码,Timestamp驱动代码,ISR代码，Simple Flash Access驱动代码，UART代码-NIOSII examples of code. Including the system clock source, DMA (Memory to Memory) drive code, Fine-gained Flash Access driver code, Timestamp-driven code, ISR code, Simple Flash Access driver code, UART code
Platform: | Size: 8192 | Author: danielmu | Hits:

[ARM-PowerPC-ColdFire-MIPS] niossramflash

Description: 在altera FPGA ep3c25器件上实现niosii+sram+flash-Altera FPGA ep3c25 in devices to achieve niosii+ sram+ flash
Platform: | Size: 17807360 | Author: billfeng | Hits:

[Embeded-SCM Develop] NiosII_CN

Description: niosII学习教程，flash版。适合初学者了解niosII的基本知识-niosII learning tutorial, flash version. Suitable for beginners to understand the basics of niosII
Platform: | Size: 61529088 | Author: 刘非 | Hits:

[VHDL-FPGA-Verilog] EP2C8_SDRAM_FLASH

Description: NIOSII FLASH设置程序范例，sopc应用-NIOSII FLASH setup example, sopc application
Platform: | Size: 6361088 | Author: liming | Hits:

[Embeded-SCM Develop] NiosII-example

Description: 众多nios内核软件实例，包括Alarm范例、DMA范例、ISR范例、字符模式设备范例、Simple Flash范例-Nios core software of many examples, including the Alarm example, DMA example, ISR example, character-mode device example, Simple Flash Examples, etc.
Platform: | Size: 8192 | Author: 杨明辉 | Hits:

[VHDL-FPGA-Verilog] NiosII

Description: FPGA NiosII 相关例程，Flash方面的和实验的几个例程，学习FPGA NIOSII 感兴趣的赶紧下载吧，编译通过，直接能用。-FPGA NiosII related routines, Flash and experimental aspects of several routines, learning FPGA NIOSII interested in quickly download it, compile, can be used directly.
Platform: | Size: 13899776 | Author: xhl | Hits:

[VHDL-FPGA-Verilog] Flash

Description: QuartusII NiosII 怎样通过FLASH方式下载程序-How to download programs through the FLASH mode
Platform: | Size: 8504320 | Author: 张晓瑞 | Hits:

[Software Engineering] Flash-use-in-NiosII

Description: nios II中的flash使用，供大家参考学习。-flash use in nios II，For your reference.
Platform: | Size: 611328 | Author: 刘欣 | Hits:
« 12 »

CodeBus www.codebus.net